1. Field of the Invention
The present invention relates generally to an output circuit for a semiconductor device. More particularly, the invention relates to an output circuit suitable for use in a data communications system.
2. Description of the Related Art
In a bus-based data communications system, it is important to lengthen the data transfer distance and improve the reliability of data transfer. Therefore, in output circuits of semiconductor devices which are used in such a data communications system, ensured reliability of data, longer transfer capability and lower consumed power are demanded.
FIG. 1 is a circuit diagram showing a conventional 3-value output circuit for a semiconductor device that outputs three values of "+1", "0" and "-1". The output data "-1" is obtained, for example, in the following manner. As NOR gate 1a, NAND gate 2a, inverter circuits 3b, 3c and 3d, and transistors Tr1 and Tr2 operate in response to a L-level high-impedance setting signal Z and a H-level input signal IN, a L-level output signal OUTP is output from an output terminal T.sub.01. As NOR gate 1b, NAND gate 2b, inverter circuits 3a, 3e and 3f, and transistors Tr3 and Tr4 operate in response to the L-level high-impedance setting signal Z and the H-level input signal IN, a H-level output signal OUTM is output from an output terminal T.sub.02. The output data "-1" is acquired from the L-level level output signal OUTP and the H-level output signal OUTM.
The output data "+1" is acquired from a H-level output signal OUTP and a L-level output signal OUTM, which are output when the aforementioned individual circuits operate in response to the L-level high-impedance setting signal Z and a L-level input signal IN.
The output data "0" is obtained as follows. When the high-impedance setting signal Z is set to the H-level, the transistors Tr1, Tr2, Tr3 and Tr4 are turned off regardless of the level of the input signal IN. As a result, the output signals OUTP and OUTM are both rendered in the high-impedance state, thus yielding the output data "0".
When the output signals OUTP and OUTM are both in the high-impedance state, the voltages on transfer lines L1 and L2 which are respectively connected to the output terminals T.sub.01 and T.sub.02 become unstable. During the transition of the levels of the voltages on transfer lines L1 and L2 from the H-level or L-level to an intermediate level, therefore, noise N such as undershoot or overshoot as shown in FIG. 2 is likely to appear on the output signal. Such noise N may lead to the transfer of erroneous data to a receiving apparatus connected to the transfer lines L1 and L2 (see FIG. 1). This noise N can be reduced by providing a terminating resistor R having a relatively low resistance between the transfer lines L1 and L2. This terminating resistor R however lowers the rising and falling speeds of the output signals OUTP and OUTM. Further, the amplitudes of the output signals OUTP and OUTM become lower and thus reduces the reliability of data transferred using the long transfer lines L1 and L2. Also, the use of the transistors Tr1 to Tr4 having an enhanced current drive performances to acquire an output signal with a sufficient amplitude results in the undesirable increase in the current that flows across the terminating resistor R. Consequently, the terminating resistor R increases the power consumption of the output circuit.